Intel Unveils Experimental TeraFLOP Processor
At Intel's Developer Conference on Tuesday, the world's largest chip maker outlined plans to produce processors capable one trillion operations per second (teraFLOPs) and terabytes of bandwidth.
Intel Chief Technology Officer, Justin Rattner, said that during the next decade online software services will be hosted by mega data centers containing millions of servers,
allowing people to access personal data, media and applications from any device. Processors today, he contended, are not capable of serving that kind of environment.
The Santa-Clara Calif.-based company is working on a solution however, revealing the first details its tera-scale research chip, the world's first programmable TeraFLOP processor. Containing 80 simple cores and operating at 3.1 GHz, the goal of this experimental chip is to test new techniques for improved performance.
"When combined with our recent breakthroughs in silicon photonics, these experimental chips address the three major requirements for tera-scale computing - teraOPS of performance, terabytes-per-second of memory bandwidth, and terabits-per-second of I/O capacity,' said Rattner.
The company said that commercial application was still years away, however, it is an exciting first step in bringing tera-scale performance to PCs and servers, Rattner concluded.
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