State University of North Carolina researchers have published a report that examines how multi-core processors can be improved by studying how bandwidth is managed, a report said.

The research team said that depending on a certain application, it is possible to achieve performance improvement up to 40 per cent. The applications that were used for the experiment mainly dealt with crunching numbers and compressing data.

Memory chips often run slow compared to processors which can pick up frequencies of more than 3GHz.

“The first technique relies on criteria we developed to determine how much bandwidth should be allotted to each core on a chip,” says Yan Solihin, associate professor of electrical and computer engineering at NC State university in the university website.

Using both sets of option, the researchers were able to boost the multi-core chip performance by 40 percent, compared to multi-core chips which do not fetch data.

“The second technique relies on a set of criteria we developed for determining when prefetching will boost performance and should be utilized,” Solihin added.

The paper, “Studying the Impact of Hardware Prefetching and Bandwidth Partitioning in Chip-Multiprocessors,” will be put forward on June 9 at the International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS) in San Jose, California. The research was supported by the National Science Foundation.

California Electronics California Management